PAVLOV: A Programmable Architecture for Volume Processing

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dc.contributor.authorKreeger, Kevinen_US
dc.contributor.authorKaufman, Arieen_US
dc.contributor.editorS. N. Spenceren_US
dc.date.accessioned2014-02-06T15:01:27Z
dc.date.available2014-02-06T15:01:27Z
dc.date.issued1998en_US
dc.description.abstractWe present a parallel 2D mesh connected architecture with SIMD processing elements. The design allows for real-time volume rendering as well as interactive 30 segmentation and 1D feature extraction. This is possible because the SIMD processing elements are programmable, a feature which also allows the use of many different rendering algorithms. We present an algorithm which, with the addition of hardware resources, provides conflict free access to volume slices along any of the three major axes. The volume access conflict has been the main reason why previous similar architectures could not perform real-time volume rendering. We present the performance of preliminary algorithms on a software simulator of the architecture design.en_US
dc.description.seriesinformationSIGGRAPH/Eurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbn0-89791-097-Xen_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH98/077-086en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectC.1.2 [Processor Architectures]en_US
dc.subjectMultiple Data Stream . Architectures (Multiprocessors)en_US
dc.subjectSingleen_US
dc.subjectinstructionen_US
dc.subjectstreamen_US
dc.subjectmultipleen_US
dc.subjectdataen_US
dc.subjectstream processors (SIMD)en_US
dc.subject1.3.1 [Computer Graphics]en_US
dc.subjectHardware Architectureen_US
dc.subjectGraphics processorsen_US
dc.subjectParallel processingen_US
dc.subject1.4.6 [Image Processing And Computer Vision]en_US
dc.subjectSegmentationen_US
dc.titlePAVLOV: A Programmable Architecture for Volume Processingen_US
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EGGH98: SIGGRAPH/Eurographics Workshop on Graphics Hardware 1998