Neon: A Single-Chip 3D Workstation Graphics Accelerator

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dc.contributor.authorMcCormack, Joelen_US
dc.contributor.authorMcNamara, Roberten_US
dc.contributor.authorGianos, Christopheren_US
dc.contributor.authorSeiler, Larryen_US
dc.contributor.authorJouppi, Norman P.en_US
dc.contributor.authorCorrell, Kenen_US
dc.contributor.editorS. N. Spenceren_US
dc.date.accessioned2014-02-06T15:01:29Z
dc.date.available2014-02-06T15:01:29Z
dc.date.issued1998en_US
dc.description.abstractHigh-performance 3D graphics accelerators traditionally require multiple chips on multiple boards, including geometry, rasterizing, pixel processing, and texture mapping chips. These designs are often scalable: they can increase performance by using more chips. Scalability has obvious costs: a minimal configuration needs several chips, and some configurations must replicate texture maps. A less obvious cost is the almost irresistible temptation to replicate chips to increase performance, rather than to design individual chips for higher performance in the first place. In contrast, Neon is a single chip that performs like a multichip design. Neon accelerates OpenGL [19] 3D rendering, as well as X11 [20] and Windows/NT 2D rendering. Since our pin budget limited peak memory bandwidth, we designed Neon from the memory system upward in order to reduce bandwidth requirements. Neon has no special-purpose memories; its eight independent 32-bit memory controllers can access color buffers, 1. depth buffers, stencil buffers, and texture data. To fit our gate budget, we shared logic among different operations with similar implementation requirements, and left floating point calculations to Digital s Alpha CPUs. Neon s performance is between HP s Visualize fx<sup>4</sup> and fx<sup>6</sup>, and is well above SGI s MXE for most operations. Neon-based boards cost much less than these competitors, due to a small part count and use of commodity SDRAMs.en_US
dc.description.seriesinformationSIGGRAPH/Eurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbn0-89791-097-Xen_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH98/123-132en_US
dc.publisherThe Eurographics Associationen_US
dc.subject1.3.1 [Computer Graphics]en_US
dc.subjectHardware Architectureen_US
dc.subjectGraphics processorsen_US
dc.subject1.3.3 [Computer Graphics]en_US
dc.subjectPicture/Image Generationen_US
dc.subjectLine and curve generationen_US
dc.subject1.3.7 [Computer Graphics]en_US
dc.subjectThreeen_US
dc.subjectdimensional Graphics and Realismen_US
dc.subjectColoren_US
dc.subjectshadingen_US
dc.subjectshadowingen_US
dc.subjectand textureen_US
dc.subjectB.3.2 [Memory Structures]en_US
dc.subjectDesign Styleen_US
dc.subjectCache memoriesen_US
dc.titleNeon: A Single-Chip 3D Workstation Graphics Acceleratoren_US
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EGGH98: SIGGRAPH/Eurographics Workshop on Graphics Hardware 1998