Architectures of Graphic Processors for Interactive 2D Graphics
dc.contributor.author | Fontenier, Guy | en_US |
dc.contributor.author | Gros, Pascal | en_US |
dc.date.accessioned | 2014-10-21T05:56:51Z | |
dc.date.available | 2014-10-21T05:56:51Z | |
dc.date.issued | 1988 | en_US |
dc.description.abstract | Interactive 2-D systems have benefited greatly from the improvements in 1C technology. Today, the trend is to relieve the host computer from low level tasks through increasing the graphic system s computational power. The introduction of video RAMs has solved the problem of contention for memory cycles between the display generator and the video refresh controller. The improvements in graphic controllers have led from the first fixed instructions controllers to today s third generation of programmable graphic processors, able to support computer graphic interface standards. This article will present this evolution, and focus on a 2-D graphic processor designed at the Imagery, Instrumentation and Systems Laboratory, based on the separation of graphic generation and memory management functions. | en_US |
dc.description.number | 2 | en_US |
dc.description.seriesinformation | Computer Graphics Forum | en_US |
dc.description.volume | 7 | en_US |
dc.identifier.doi | 10.1111/j.1467-8659.1988.tb00593.x | en_US |
dc.identifier.issn | 1467-8659 | en_US |
dc.identifier.pages | 79-89 | en_US |
dc.identifier.uri | https://doi.org/10.1111/j.1467-8659.1988.tb00593.x | en_US |
dc.publisher | Blackwell Publishing Ltd and the Eurographics Association | en_US |
dc.title | Architectures of Graphic Processors for Interactive 2D Graphics | en_US |