Hexagonal Storage Scheme for Interleaved Frame Buffers and Textures
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Date
2005
Journal Title
Journal ISSN
Volume Title
Publisher
The Eurographics Association
Abstract
This paper presents a storage scheme which statically assigns pixel/texel coordinates to multiple memory banks in order to minimize frame buffer and texture memory access load imbalance. In this scheme, the pixels stored in a particular memory bank are placed at the center and the vertices of hexagons packed in the frame buffer. By making these hexagons close to regular so that the pixel placement is uniform and isotropic, frame buffer and texture memory accesses are evenly distributed over the memory banks. The analysis of memory access patterns in rendering typical 3D graphics scenes shows that the hexagonal storage scheme can reduce rendering performance degradation due to bank conflicts by an average of 10% compared to the traditional rectangular storage scheme.
Description
@inproceedings{:10.2312/EGGH/EGGH05/033-040,
booktitle = {Graphics Hardware},
editor = {Michael Meissner and Bengt-Olaf Schneider},
title = {{Hexagonal Storage Scheme for Interleaved Frame Buffers and Textures}},
author = {Bando, Yosuke and Saito, Takahiro and Fujita, Masahiro},
year = {2005},
publisher = {The Eurographics Association},
ISSN = {1727-3471},
ISBN = {1-59593-086-8},
DOI = {/10.2312/EGGH/EGGH05/033-040}
}