Packet-Oriented Streamline Tracing on Modern SIMD Architectures

dc.contributor.authorHentschel, Bernden_US
dc.contributor.authorGöbbert, Jens Henriken_US
dc.contributor.authorKlemm, Michaelen_US
dc.contributor.authorSpringer, Paulen_US
dc.contributor.authorSchnorr, Andreaen_US
dc.contributor.authorKuhlen, Torsten W.en_US
dc.contributor.editorC. Dachsbacher and P. Navrátilen_US
dc.date.accessioned2015-05-24T19:41:11Z
dc.date.available2015-05-24T19:41:11Z
dc.date.issued2015en_US
dc.description.abstractThe advection of integral lines is an important computational kernel in vector field visualization. We investigate how this kernel can profit from vector (SIMD) extensions in modern CPUs. As a baseline, we formulate a streamline tracing algorithm that facilitates auto-vectorization by an optimizing compiler. We analyze this algorithm and propose two different optimizations. Our results show that particle tracing does not per se benefit from SIMD computation. Based on a careful analysis of the auto-vectorized code, we propose an optimized data access routine and a re-packing scheme which increases average SIMD efficiency. We evaluate our approach on three different, turbulent flow fields. Our optimized approaches increase integration performance up to 5:6 over our baseline measurement. We conclude with a discussion of current limitations and aspects for future work.en_US
dc.description.sectionheadersParallel Renderingen_US
dc.description.seriesinformationEurographics Symposium on Parallel Graphics and Visualizationen_US
dc.identifier.doi10.2312/pgv.20151154en_US
dc.identifier.pages43-52en_US
dc.identifier.urihttps://doi.org/10.2312/pgv.20151154en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectC.1.2 [Computer Systems Organization]en_US
dc.subjectMultiple Data Stream Architectures (Multiprocessors)en_US
dc.subjectSingleen_US
dc.subjectinstructionen_US
dc.subjectstreamen_US
dc.subjectmultipleen_US
dc.subjectdataen_US
dc.subjectstream processors (SIMD)en_US
dc.subjectI.3.1 [Computer Graphics]en_US
dc.subjectHardware Architectureen_US
dc.subjectParallel Processingen_US
dc.subjectI.6.6 [Computing Methodologies]en_US
dc.subjectSimulation and Modelingen_US
dc.subjectSimulation Output Analysisen_US
dc.titlePacket-Oriented Streamline Tracing on Modern SIMD Architecturesen_US
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