VoxelCache: A Cache-Based Memory Architecture for Volume Graphics
| dc.contributor.author | Kanus, U. | en_US |
| dc.contributor.author | Wetekam, G. | en_US |
| dc.contributor.author | Hirche, J. | en_US |
| dc.contributor.editor | M. Doggett and W. Heidrich and W. Mark and A. Schilling | en_US |
| dc.date.accessioned | 2013-10-28T10:01:30Z | |
| dc.date.available | 2013-10-28T10:01:30Z | |
| dc.date.issued | 2003 | en_US |
| dc.description.abstract | This paper presents a cache-based memory architecture for volume graphics. We describe the memory organization and cache logic to implement a voxel cache based on 43 voxel blocks. We show an efficient prefetching scheme that increases the cache hit ratio to more than 98% in most cases. The performance of the memory system with different types of external memory is demonstrated by a cycle accurate C++ simulation. The VoxelCache memory architecture is designed to be easily adapted to different memory technologies, because all volume graphics specific parts of the memory system are encapsulated inside the on-chip cache. The design is targeted at implementation on off-the-shelf reconfigurable hardware. | en_US |
| dc.description.seriesinformation | Graphics Hardware | en_US |
| dc.identifier.isbn | 1-58113-739-1 | en_US |
| dc.identifier.issn | 1727-3471 | en_US |
| dc.identifier.uri | https://doi.org/10.2312/EGGH03/076-083 | en_US |
| dc.publisher | The Eurographics Association | en_US |
| dc.subject | I.3.1 [Computer Graphics] | en_US |
| dc.subject | Hardware Architecture | en_US |
| dc.subject | Graphics processor | en_US |
| dc.subject | I.3.7 [Computer Graphics] | en_US |
| dc.subject | Three Dimensional Graphics and Realism | en_US |
| dc.subject | C.3 [Computer Systems Organization] | en_US |
| dc.subject | Special | en_US |
| dc.subject | Purpose and Application | en_US |
| dc.subject | Based Systems | en_US |
| dc.title | VoxelCache: A Cache-Based Memory Architecture for Volume Graphics | en_US |