Hardware Outline Character Rasterization

Morgan, Marc; Hersch, Roger D.

Hardware Outline Character Rasterization

Files

103-115.pdf (1.94 MB)

Date

1991

Authors

Morgan, Marc
Hersch, Roger D.

Publisher

The Eurographics Association

Abstract

This paper presents the design and implementation of an application specific integrated circuit (ASIC) for real-time rasterization of characters described by their outline based on vertical scan-conversion and flag fill algorithms. The chip acts as a coprocessor which rasterizes outline fonts given by Bezier splines and straight line segments. It generates high quality fonts at a rate 30 times higher than the equivalent assembly language code on a 16 MHz M68020.

        @inproceedings{:10.2312/EGGH/EGGH91/103-115
,
booktitle = {Eurographics Workshop on Graphics Hardware
},
editor = {A. Kaufman
},
title = {{Hardware Outline Character Rasterization
}},
author = {Morgan, Marc and 
Hersch, Roger D.
},
year = {1991
},
publisher = {The Eurographics Association
},
ISSN = {-
},
ISBN = {-
},
DOI = {/10.2312/EGGH/EGGH91/103-115
}
}