Practical logarithmic rasterization for low-error shadow maps
dc.contributor.author | Lloyd, D. Brandon | en_US |
dc.contributor.author | Govindaraju, Naga K. | en_US |
dc.contributor.author | Molnar, Steven E. | en_US |
dc.contributor.author | Manocha, Dinesh | en_US |
dc.contributor.editor | Mark Segal and Timo Aila | en_US |
dc.date.accessioned | 2013-10-28T10:17:31Z | |
dc.date.available | 2013-10-28T10:17:31Z | |
dc.date.issued | 2007 | en_US |
dc.description.abstract | Logarithmic shadow maps can deliver the same quality as competing shadow map algorithms with substantially less storage and bandwidth. We show how current GPU architectures can be modified incrementally to support rendering of logarithmic shadow maps at current GPU fill rates. Specifically, we modify the rasterizer to support rendering to a nonuniform grid with the same watertight rasterization properties as current rasterizers. We also describe a depth compression scheme to handle the nonlinear primitives produced by logarithmic rasterization. Our proposed architecture enhancements align with current trends of decreasing cost for on-chip computation relative to off-chip bandwidth and storage. For a modest increase in computation, logarithmic rasterization can greatly reduce shadow map bandwidth and storage costs. | en_US |
dc.description.seriesinformation | SIGGRAPH/Eurographics Workshop on Graphics Hardware | en_US |
dc.identifier.isbn | 978-3-905673-47-0 | en_US |
dc.identifier.issn | 1727-3471 | en_US |
dc.identifier.uri | https://doi.org/10.2312/EGGH/EGGH07/017-024 | en_US |
dc.publisher | The Eurographics Association | en_US |
dc.subject | Categories and Subject Descriptors (according to ACM CCS): I.3.3 [Computer Graphics]: Hardware Architecture- Graphics processors, I.3.7 [Computer Graphics]: Color, shading, shadowing, and texture | en_US |
dc.title | Practical logarithmic rasterization for low-error shadow maps | en_US |
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