EGGH01: SIGGRAPH/Eurographics Workshop on Graphics Hardware 2001

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https://diglib.eg.org/handle/10.2312/334

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Browsing EGGH01: SIGGRAPH/Eurographics Workshop on Graphics Hardware 2001 by Subject "Hardware Architecture"

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    Compiling to a VLIW Fragment Pipeline
    (The Eurographics Association, 2001) Mark, William R.; Proudfoot, Kekoa; Kurt Akeley and Ulrich Neumann
    The latest generation of graphics hardware supports fully programmable vertex and pixel/fragment operations, but programming this hardware at a low level is difficult and time consuming. To address this problem, we have developed a complete real-time procedural shading system that compiles a high-level shading language to programmable vertex and fragment hardware, as described in a separate publication. In this paper, we describe in detail the algorithms used by this system to generate and optimize fragment code for NVIDIAs register combiner architecture and show that our compiler generates efficient code. The register combiner architecture has some similarities to WIW CPU architectures, so we compare our compilation algorithms to those described in the literature for VLIW CPU architectures. We also discuss some of the lessons we leamed from building and using this compiler that may be useful to the designers of future programmable graphics hardware.
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    The F-Buffer: A Rasterization-Order FIFO Buffer for Multi-Pass Rendering
    (The Eurographics Association, 2001) Mark, William R.; Proudfoot, Kekoa; Kurt Akeley and Ulrich Neumann
    Multi-pass rendering is a common method of virtualizing graphics hardware to overcome limited resources. Most current multi-pass rendering techniques use the RGBA framebuffer to store intermediate results between each pass. This method of storing intermediate results makes it difficult to conectly render partially-transparent surfaces, and reduces the performance of shaders that need to preserve more than one intermediate result between passes. We propose an alternative approach to storing intermediate results that solves these problems. This approach stores intermediate colors (or other values) that are generated by a rendering pass in a FIFO buffer as the values exit the fragment pipeline. On a subsequent pass, the contents of the FIFO buffer are fed into the top of the fragment pipeline. We refer to this FIFO buffer as a fragment-stream buffer (or F-buffer), because this approach has the effect of associating intermediate results with particular rasterization fragments, rather than with an (x,y) location in the framebuffer. Implementing an F-buffer requires some changes to current mainstream graphics architectures, but these changes can be minor. We describe the designs pace associated with implementing an F-buffer, and compare the F-buffer to recirculating pipeline designs. We implement F-buffers in the Mesa software renderer, and demonstrate our programmable-shading system running on top of this renderer.
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    Quasi-Linear Depth Buffers With Variable Resolution
    (The Eurographics Association, 2001) Lapidous, Eugene; Jiao, Guofang; Zhang, Jianbo; Wilson, Timothy; Kurt Akeley and Ulrich Neumann
    In this paper we present new class of variable-resolution depth buffers, providing a flexible trade-off between depth precision in the distant areas of the view volume and performance. These depth buffers can be implemented using linear or quasi-linear mapping function of the distance to the camera to the depth in the screens pace. In particular, the complementary Z buffer algorithm combines simplicity of implementation with significant bandwidth savings. A variable-resolution depth buffer saves bandwidth by changing size of the per-pixel depth access from 24 bits to 16 bits when distance to the pixel from the camera becomes larger than a given threshold, This distance is selected in order to keep the resulting resolution equal or larger than the resolution of the 24-bit screen Z buffer. For dynamic ratios of the distances between far and near planes 500 and above, bandwidth savings may exceed 20%. Quasi-linear depth floating-point depth buffers are best at high dynamic ratios; 3D hardware should support per-frame setting of the optimal depth buffer type and format. Per-frame adjustment of the resolution switch distance allows balancing performance with depth precision and should be exposed in the graphics A PI.
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    Real-Time Bump Map Synthesis
    (The Eurographics Association, 2001) Kautz, Jan; Heidrich, Wolfgang; Seidel, Hans-Peter; Kurt Akeley and Ulrich Neumann
    In this paper we present a method that automatically synthesizes bump maps at arbitrary levels of detail in real-time. The only input data we require is a normal density function; the bump map is generated according to that function. It is also used to shade the generated bump map. The technique allows to infinitely zoom into the surface, because more (consistent) detail can be created on the fly. The shading of such a surface is consistent when displayed at different distances to the viewer (assuming that the surface structure is self-similar). The bump map generation and the shading algorithm can also be used separately.
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    Watertight Tessellation using Forward Differencing
    (The Eurographics Association, 2001) Moreton, Henry; Kurt Akeley and Ulrich Neumann
    In this paper we describe an algorithm and hardware for the tessellation of polynomial surfaces. While conventional forward difference-based tessellation is subject to round off error and cracking, our algorithm produces a bit-for-bit consistent triangle mesh across multiple independently tessellated patches. We present tessellation patterns that exploit the efficiency of iterative evaluation techniques while delivering a defect free adaptive tessellation with continuous level-of-detail. We also report the rendering performance of the resulting physical hardware implementation.